I'm an AI compiler engineer at MediaTek. I work on the compiler for MDLA, MediaTek's on-device NPU, and spend most of my days figuring out how to make neural networks run faster and use less memory on it.
I came to compilers from computer vision. During my master's at NYCU I was in the HCIS Lab, working on risk object identification for autonomous driving 🚗. That background still helps a lot. It's much easier to optimize a model when you know what it's actually doing.
- Hardware-aware optimizations in the MDLA compiler
- Tracking down NPU performance bottlenecks, and building a hint-guided option tuner to get better speed and memory usage
- Tools I use every day:
I'm also really interested in generative AI on edge devices, and in how to make it fast enough to be useful in practice.
💼 MediaTek · AI Compiler Engineer · 2025 – now
💼 EGO INNOVATION · Software Engineer · 2024 – 2025
🎓 NYCU · M.S. in Multimedia Engineering, advised by Yi-Ting Chen · 2021 – 2025
🎓 NSYSU · B.S. in Computer Science and Engineering · 2017 – 2021
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Potential Field as Scene Affordance for Behavior Change-Based Visual Risk Object Identification
Pang-Yuan Pao, Shu-Wei Lu, Ze-Yan Lu, Yi-Ting Chen
ICRA 2025 · Project page -
RiskBench: A Scenario-based Risk Identification Benchmark
Chi-Hsi Kung, Pang-Yuan Pao, Chieh-Chi Yang, Shu-Wei Lu, Pin-Lun Chen, Hsin-Cheng Lu, Yi-Ting Chen
ICRA 2024 · Project page
