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The ltc4283 driver is already upstream! Any reason this device cannot be supported in that driver? |
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I was pulled late into the project (around May), so I simply continued work until I ended up being the submitter. I wasn't aware of ltc4283 being in the works, and I think we can't easily add on ltc4282. Digging some history there's this #3126 that seemed to have decided why we have a separate driver code. but now that I see LTC4283 I am inclined to just add support on it, the code overlap seems considerable compared to probable extra code lines. |
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v2:
For the gpio support, I was thinking since it's exactly the same feature, just mentioning it in kconfig was enough |
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TPS536C7 is a PMBus-compliant dual-channel D-CAP+ multiphase step-down controller. Add its compatible string. Signed-off-by: Sanman Pradhan <psanman@juniper.net> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260915164823.160977-3-sanman.pradhan@hpe.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
TPS536C7 is a dual-channel D-CAP+ step-down controller whose channels are distributed across a configurable number of phases (N+M, up to 12 total). Whether channel B (PMBus page 1) exists depends on the phase configuration register, so the page count is derived at probe time. Factor the TPS53676 phase-map parsing into a shared helper and reuse it for TPS536C7. Only aggregate per-channel telemetry is exposed: leave info->phases[] unset so the PMBus core never programs the PHASE selector on every read (and because TPS536C7 can place up to 12 phases on channel A, exceeding PMBUS_PHASES). Report VOUT in linear format like TPS53676. Since the core never programs PHASE, set it to 0xff on each populated page so READ_IOUT reports the aggregate channel current, and verify it (PHASE can be write-protected). Fail identification if aggregate selection cannot be established, since otherwise a single phase current could be reported as the channel total. A configuration with no channel-A phase is rejected with -EOPNOTSUPP: the PMBus core models pages as the contiguous range 0..pages-1 and cannot represent a channel-A-absent topology. On the tested TPS536C7 (device ID 54 49 53 6c 70 00, CAPABILITY 0xd0), block reads of IC_DEVICE_ID and USER_DATA_03 return -EBADMSG with PEC enabled, while retrying those two reads without PEC returns the expected 6- and 24-byte payloads. Standard byte/word telemetry keeps using PEC, so only those two identification reads fall back to no-PEC. Co-developed-by: Senthil Muniyappan <smuniyappan@juniper.net> Co-developed-by: Vaibhav Agarwal <avaibhav@juniper.net> Signed-off-by: Sanman Pradhan <psanman@juniper.net> Link: https://patch.msgid.link/20260915164823.160977-4-sanman.pradhan@hpe.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Use a designated initializer for the acpi_device_id fields which makes the code more readable and consistent with how lists are initialized in the rest of the kernel code base. Also drop explicitly setting fields to 0 where it is redundant. Unify the list terminator to have a single space between the brackets and no trailing comma. Signed-off-by: Pawel Zalewski <pzalewski@thegoodpenguin.co.uk> Link: https://patch.msgid.link/20260915-acpi-hwmon-v2-1-39d17c748eb6@thegoodpenguin.co.uk Signed-off-by: Guenter Roeck <linux@roeck-us.net>
tps536c7_identify() sets info->pages to 1 for a single-channel part and then accesses page 0 (writing PMBUS_PHASE) without ensuring PAGE is actually 0. pmbus_set_page() does not update the PAGE register when info->pages is 1, so if boot firmware left PAGE set to another value the PHASE writes and subsequent telemetry may target the wrong page. Select page 0 explicitly before configuring PHASE. Signed-off-by: Sanman Pradhan <psanman@juniper.net> Link: https://patch.msgid.link/20260916235406.681131-3-sanman.pradhan@hpe.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The LTC4283 is a negative voltage hot swap controller that drives an external N-channel MOSFET to allow a board to be safely inserted and removed from a live backplane. Note that this device has a MODE pin that is determined by differing voltage levels (VEE, VIN, INTVCC, or left open) and cannot be controlled via software or GPIO. Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Support the LTC4284 Hot Swap Controller. It is very Similar to LTC4283 but for higher power. The device features programmable current limit with foldback and independently adjustable inrush current to optimize the MOSFET safe operating area (SOA). The SOA timer limits MOSFET temperature rise for reliable protection against overstresses. An I2C interface and onboard ADC allow monitoring of board current, voltage, power, energy, and fault status. Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Similar to LTC4283, LTC4284 has up to 8 pins that can be configured as GPIOs and behaves the same. Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
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PR got stale, just following up on review @nunojsa |
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PR Description
The LTC4284 is a high-power hot swap controller designed for -48V distributed power systems supporting up to 2500W applications. It features dual-gate MOSFET drivers with multiple operation modes, comprehensive monitoring capabilities, and advanced protection.
Datasheet: LTC4284
This PR is for upstreaming
This is for dev branch in case some tests/features are requested: #3351
This supersedes the old draft PR #3126
Key features:
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