[backport] iio: adc: ad4080: allow debugfs register access to both channels - #3516
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The dual-channel parts (AD4880/AD4883/AD4884) are built from two independent ADC dies, each with its own SPI chip select and register map. They are presented as a single IIO device because the FPGA interleaves both dies into one DMA stream, so only one direct_reg_access debugfs file is created and it can only reach channel A's regmap. Channel B's registers are therefore inaccessible, which blocks bring-up and debugging of the second die. Select the target die through the debugfs register address: the low 8 bits are the register offset and the upper bits are the channel index (0x0nn selects channel A, 0x1nn channel B). A read returns the real register value of the selected die and each die is addressed independently; single-channel parts only accept channel 0. Link: https://patch.msgid.link/20260826111613.14218-1-antoniu.miclaus@analog.com Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
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August 31, 2026 08:42
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Aug 31, 2026
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PR Description
The dual-channel parts (AD4880/AD4883/AD4884) are built from two independent ADC dies, each with its own SPI chip select and register map. They are presented as a single IIO device because the FPGA interleaves both dies into one DMA stream, so only one direct_reg_access debugfs file is created and it can only reach channel A's regmap. Channel B's registers are therefore inaccessible, which blocks bring-up and debugging of the second die.
Select the target die through the debugfs register address: the low 8 bits are the register offset and the upper bits are the channel index (0x0nn selects channel A, 0x1nn channel B). A read returns the real register value of the selected die and each die is addressed independently; single-channel parts only accept channel 0.
Link: https://patch.msgid.link/20260826111613.14218-1-antoniu.miclaus@analog.com
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