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Add single-word fast path to RegisterIO for zero-cost accesses - #18
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`RegisterIO::try_read_register`/`try_write_register` always ran the generic multi-word subword loop (map/try_fold and a `for` loop). Even for single-word registers — the common case — that loop prevented the access from folding to a single volatile load/store, so each register access compiled to a call into a monomorphized helper rather than one instruction. Add a `num_subwords == 1` fast path to both methods. `num_subwords` is a compile-time constant derived from `size_of`, so for single-word registers the multi-word loop is dropped entirely and the access folds to a single instruction at the call site. The loop is retained as the fallback for multi-word registers, so behavior is unchanged (the fast path is the loop's single-iteration case). Measured ~10% `.text` reduction on a register-heavy RISC-V (riscv32imc) `-Oz` firmware (72.5 KiB -> 64.6 KiB of .text+.text_high). No `#[inline]` hints are needed: the small fast-path bodies are inlined by normal optimization. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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Sorry it took me a while to get to this. I tested on my own project and saw a .text reduction of about 2 kB, verifying that the try_read_register functions were inlined to a couple instructions. Thanks for figuring this out! |
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This is now available with the peakrdl-rust crate version 0.2.2. |
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Add a
num_subwords == 1fast path to both methods and mark them (and theEndianimpl methods)#[inline(always)].num_subwordsis a compile-time constant derived fromsize_of, so for single-word registers the multi-word loop is dropped entirely and the access folds to a single instruction at the call site. The loop is retained as the fallback for multi-word registers, so behavior is unchanged (the fast path is the loop's single-iteration case).Measured ~10%
.textreduction on a register-heavy RISC-V (riscv32imc)-Ozfirmware (72.5 KiB -> 64.8 KiB of .text+.text_high).