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81 changes: 81 additions & 0 deletions generator_plugins/riscv_tests_plugin/init_pmp.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,81 @@
diff --git a/p/riscv_test.h b/p/riscv_test.h
index fe14f08..55081e5 100644
--- a/p/riscv_test.h
+++ b/p/riscv_test.h
@@ -191,12 +191,17 @@ handle_exception: \
write_tohost: \
sw TESTNUM, tohost, t5; \
sw zero, tohost + 4, t5; \
- j write_tohost; \
+ rtl_end: \
+ fence.i; \
+ li t6, 0x20000; \
+ la t5, begin_signature; \
+ sw t5, 0(t6); \
+ la t5, end_signature; \
+ sw t5, 8(t6); \
+ sw t5, 12(t6); \
reset_vector: \
INIT_XREG; \
RISCV_MULTICORE_DISABLE; \
- INIT_SATP; \
- INIT_PMP; \
DELEGATE_NO_TRAPS; \
li TESTNUM, 0; \
la t0, trap_vector; \
diff --git a/v/entry.S b/v/entry.S
--- a/v/entry.S
+++ b/v/entry.S
@@ -25,7 +25,19 @@ nmi_vector:

.align 2
trap_vector:
- j wtf
+ csrr t5, mcause
+ li t6, CAUSE_SUPERVISOR_ECALL
+ bne t5, t6, wtf
+write_tohost:
+ sw TESTNUM, tohost, t5
+rtl2_end:
+ fence.i
+ li t6, 0x20000
+ la t5, begin_signature
+ sw t5, 0(t6)
+ la t5, end_signature
+ sw t5, 8(t6)
+ sw t5, 12(t6)

handle_reset:
li x1, 0
diff --git a/v/riscv_test.h b/v/riscv_test.h
--- a/v/riscv_test.h
+++ b/v/riscv_test.h
@@ -42,8 +42,15 @@ userstart: \
// Data Section Macro
//-----------------------------------------------------------------------

-#undef RVTEST_DATA_END
-#define RVTEST_DATA_END
+#define RVTEST_DATA_BEGIN \
+ EXTRA_DATA \
+ .pushsection .tohost,"aw",@progbits; \
+ .align 6; .global tohost; tohost: .dword 0; \
+ .align 6; .global fromhost; fromhost: .dword 0; \
+ .popsection; \
+ .align 4; .global begin_signature; begin_signature:
+
+#define RVTEST_DATA_END .align 4; .global end_signature; end_signature:

//-----------------------------------------------------------------------
// Supervisor mode definitions and macros
diff --git a/v/vm.c b/v/vm.c
--- a/v/vm.c
+++ b/v/vm.c
@@ -52,6 +52,7 @@ static void cputstring(const char* s)
static void terminate(int code)
{
do_tohost(code);
+ asm volatile ("scall\n\t");
while (1);
}

6 changes: 4 additions & 2 deletions generator_plugins/riscv_tests_plugin/riscv_tests_plugin.py
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@ def pre_gen(self, spec_config, output_dir):
# Extract plugin specific info
self.jobs = spec_config['jobs']
self.filter = spec_config['filter']
self.pmp_enabled = True if str(spec_config['pmp_enabled']).lower() == "true" else False

if not os.path.isdir(f'{self.output_dir}'):
subprocess.call(shlex.split(f'git clone --recursive \
Expand Down Expand Up @@ -88,10 +89,11 @@ def gen(self, module_dir, output_dir):

cwd = os.getcwd()
os.chdir(f'{self.output_dir}/env')
result = subprocess.run(shlex.split(f'git apply --check {module_dir}/{self.name}_plugin/patch'), capture_output=True, text=True)
patch_name = "init_pmp.patch" if self.pmp_enabled else "patch"
result = subprocess.run(shlex.split(f'git apply --check {module_dir}/{self.name}_plugin/{patch_name}'), capture_output=True, text=True)
if not result.stdout:
logger.debug('applying patch')
result = subprocess.run(shlex.split(f'git apply {module_dir}/{self.name}_plugin/patch'), capture_output=True, text=True)
result = subprocess.run(shlex.split(f'git apply {module_dir}/{self.name}_plugin/{patch_name}'), capture_output=True, text=True)
os.chdir(cwd)

logger.debug(f'isa_dir : {self.isa_dir}')
Expand Down
7 changes: 5 additions & 2 deletions reference_plugins/spike_plugin/spike_plugin.py
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,9 @@ def init(self, ini_config, test_list, work_dir, plugin_path):

self.riscv_isa = ini_config['isa']
self.isa = ini_config['isa']
self.pmp_regions = ini_config['pmp_regions']
self.pmp_granularity = ini_config['pmp_granularity']
self.pmp_enabled = True if str(self.pmp_regions) != "0" else False
if '64' in self.riscv_isa:
self.xlen = 64
else:
Expand All @@ -40,7 +43,7 @@ def init(self, ini_config, test_list, work_dir, plugin_path):

self.objdump_cmd = ''#riscv{0}-unknown-elf-objdump -D ref.elf > ref.disass && '.format( self.xlen)
self.sim_cmd = 'spike'
self.sim_args = '--log ref.dump --log-commits --priv={0} --isa={1} {2}'
self.sim_args = '--log ref.dump --log-commits --priv={0} --isa={1} --pmpregions={2} --pmpgranularity={3} {4}'

self.work_dir = os.path.abspath(work_dir) + '/'
self.test_list = load_yaml(test_list)
Expand Down Expand Up @@ -107,7 +110,7 @@ def build(self):
post_process_cmd = ''
target_cmd = ch_cmd + compile_cmd + self.objdump_cmd +\
self.sim_cmd + ' ' + \
self.sim_args.format(spike_priv, spike_isa, self.elf)
self.sim_args.format(spike_priv, spike_isa, self.pmp_regions, self.pmp_granularity, self.elf)
make.add_target(target_cmd, test)
self.test_names.append(test)

Expand Down