Labels
Labels
55 labels
Arc
bug
bugds
Calyx
CI/CD
Comb
DC
Debug
documentation
duplicate
enhancement
ESI
ExportVerilog
FIRRTL
FSM
good first issue
Handshake
HandshakeToDC
HandshakeToHW
help wanted
HW
HWArith
ImportVerilog
infer width
interop
invalid
Kanagawa
LLHD
Logical Equivalence
LoopSchedule